IRI Research

Current Research

Computer security for complex and distributed systems

Large and distributed computer infrastructures face important cyber-security challenges. They are high value targets for attack due the big amount of computational power, storage capacity and network resources. These systems require novel computer security approaches, that employ emerging technologies such as data mining, machine learning, autonomous reasoning systems, automatic security hardening among others. Those technologies can be employed in areas such as distributed intrusion detection, automatic vulnerability discovery, automatic vulnerability patching, and in general all the areas that allow the system administration to have a clear security panorama over the entire computational infrastructure.

FPGA Fault Tolerance in Particle Physics Experiments

The increasing use of SRAM-based reconfigurable architectures at important areas of research and development like particle accelerators and space applications brings new, currently partially unattended effects on top. An already well known, but nevertheless important problem of such systems is its susceptibility to radiation which increases in conjunction with particle flux and energy. Unable to prevent these bit failures by the use of extensive shielding, our field of research is to use intelligent algorithms and redundancy features to eliminate each of such effects that may cause a Single Event Functional Interrupt (SEFI) which leads to miscalculation, system failure or an entire system halt.

Previous Research


Currently, both DAQ and HLT independently use Read-Out Receiver Cards (RORCs) to read out the detector data. Both cards provide a PCI-X Interface and two optical links. These cards transfer the data received from the optical links to the host memory using DMA and perform controlling and preprocessing. As PCI-X gets obsolete, a new common RORC for both HLT and DAQ will be developped. This card will be based on a Xilinx Virtex-6 FPGA and have a PCI-Express Gen2 interface plus several fast optical links.

A Modular Read-Out Controller for CBM

The CBM experiment at FAIR consists of a number of different detectors which require the readout of multiple detector frontend electronics. This is usually done with special FPGA based read-out controller (ROC) boards. The different detectors assemble different frontend electronics requiring different ROCs or at least different ROC firmwares. However, the interface in the other direction of the readout chain - towards the computing nodes - is usually quite the same for all the readout logics of the different detectors.

Dataflow Computing for Biophysics and High Energy Physics

We use FPGAs to implement the dataflow graphs of algorithms. Dataflow computing runs every step of an algorithm in parallel and resembles a system of pipelines with synchronous operations. It maps well to FPGA hardware and can speed up algorithms for HPC by one or two orders of magnitude compared to general purpose hardware.

Detector Control System (DCS)

A Detector Control System (DCS) gets into focus whenever a large number of various sensors and actors within a detector need to be monitored, operated or synchronized in a well specified manner by using a centralized approach. In case of particle accelerator detectors, some well established systems in this context are for example SCADA or EPICS. These control systems make it possible to connect all supervised components of a detector to a special controls network which ensures, that even in an emergency situation all devices can be reached and at least put into a safety mode that prevents human injuries or device damage.


IRI Research Group

Infrastruktur und Rechnersysteme in der Informationsverarbeitung (IRI), Goethe-Universität

Max-von-Laue-Straße 12
60438 Frankfurt am Main

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